最後更新: 2018-03-15
介紹
SPI is one of the on-board inter-IC communication interfaces.
The master IC and the slave IC are tied with three signal lines
Contents of both 8-bit shift registers are exchanged with the shift clock driven by master IC.
The data bits are shifted in MSB first.
MOSI & MISO & SCK
- Master Out/Slave In (MOSI)
- Master In/Slave Out (MISO)
- Clock (SCK)
Diagram:
Master -------------- Slave ------MOSI----> <------MISO---- ------SCK----->
SS (Slave Select) signal
other than above three is used to synchronize start of packet or byte boundary,
and for realize multi-slave configuration simultaneously.
SPI Mode
Mode 0 - Positive Pulse. Latch, then Shift.
Mode 1 - Positive Pulse. Shift, then Latch.
Mode 2 - Negative Pulse. Latch, then Shift.
Mode 3 - Negative Pulse. Shift, then Latch.
MSB & LSB
Most Significant Bit First means that the most significant bit will arrive first
LSB
0x12 => 0 0 0 1 0 0 1 0
LSB
0x12 => 0 1 0 0 1 0 0 0